Gastvortrag: Networks-on-Chip - the Stepping Stone into the Next Generation of Parallel Computing Systems

Posted on 12.01.2016 by fridolin

Today, networks-on-chip (NoCs) are indisputable reality, since they build up the communication backbone of virtually all large scale system-on-chip (SoCs) designs in 45 nm and below. Their fast industrial uptake has been driven by two converging trends. First, Moore’s law has maintained its pace in terms of logic (and storage) density, but it has finally reached hard limits in terms of power and synchronization. Hence, SoCs today heavily rely on multicore parallelism and locally synchronous, globally asynchronous (GALS) power domains. Second, the complexity of large-scale SoCs, combined with the ever-increasing time-to-market pressure, have pushed for a strong componentization and modularization of silicon platforms. NoCs meet all the key requirements imposed by these converging trends. The speaker will provide strong guidance in a reasearch field that is far from stabilizing.

Sitzungszimmer des Dekanats der Fakultät für Informatik, Erzherzog-Johann-PLatz 1, 4. Stock